I. Field of the Invention
This invention relates generally to the electronic processing art and, in particular, to an improved low noise frequency synthesizer with high speed locking capability.
II. Description of the Prior Art
Digital frequency synthesizers commonly employ standard phase-lock loop circuitry wherein a voltage controlled oscillator (VCO) signal F.sub.VCO is divided by a loop divider. The output of the loop divider is fed back and compared in a phase comparator to a reference frequency signal F.sub.REF. The phase comparator generates a control signal which is then coupled to the controlled oscillator, thereby providing an output signal from the controlled oscillator which has the desired frequency. The loop divider produces an output signal in response to every Nth input pulse thereby dividing the input frequency by N. The output frequency of the VCO will therefore be locked to N times the reference frequency (i.e. F.sub.VCO =N.times.F.sub.REF).
One type of phase comparator which can be used is a sample-and-hold phase comparator. This type of phase comparator samples the phase relationship between the input reference frequency and the loop divider output and holds a value representative of that phase relationship on its output until the next sampling occurs. The resulting phase detection signal has minimal ripple voltage, but during each cycle of the reference waveform the output is incremented in steps according to the last sample held. This type of circuit offers high performance and is capable of integration on a semiconductor chip.
By utilizing such a sample-and-hold phase comparator and a programmable loop divider a frequency synthesizer can be constructed which is relatively low in cost and covers a wide bandwidth of frequencies. However, such systems are relatively slow in responding to a command to change the output frequency to a desired new frequency value. One method to decrease the time taken to switch to a new frequency is to increase the loop bandwidth of the synthesizer. This, however, results in increased noise and reference feedthru. Other approaches to high speed frequency synthesis include dual loop and mixed loop synthesizers. However, these require complex and expensive circuitry and tend to generate spurious signals.
Accordingly, there is a need for a frequency synthesizer which is relatively low in cost and which has the capability of very rapidly responding to a command to change its output frequency while maintaining optimum noise and spurious performance.